Submission Guidelines

The ATS 2026 Organizing Committee invites original, unpublished paper submissions on the topics listed below.

Submission Guidelines
  • Format: Regular paper submissions must be made electronically in PDF format only.
  • Page Limit: Manuscripts must not exceed 6 pages in IEEE 2-column format (A4 size, including abstract, figures, tables, and bibliography).
  • Template: Please adhere to the standard IEEE conference templates.
Author Requirements
  • Presentation: A submission will be considered evidence that, upon acceptance, at least one author will attend the conference to make the presentation.
  • Registration: At least one Author Registration (full rate) to the conference is required for each accepted paper.
  • Final Manuscript: Authors of accepted papers are responsible for preparing the final camera-ready manuscripts in time to be included in the electronic proceedings.
Publication and IEEE Xplore
  • Accepted papers will be submitted for inclusion into IEEE Xplore subject to meeting IEEE Xplore's scope and quality requirements.

Important Dates

 

Important Dates
  • Submission deadline: June 6, 2026
  • Notification of acceptance: Sept. 14, 2026
  • Camera ready manuscript: Oct. 13, 2026

Topics — Original papers on, but not limited to, the following areas are invited:

  • AI test and Test for AI
  • Analog/Mixed-Signal Test
  • ATE Design
  • Automatic Test Pattern Generation (ATPG)
  • Autonomous Testing
  • Board-Level Testing and Diagnosis
  • Boundary Scan Test
  • Built-In Self-Test (BIST)
  • CPU/GPU Test
  • Connectivity Testing
  • Defect-Based Test
  • Delay and Performance Test
  • Dependability and Functional Safety
  • Design Verification, Validation, and Debug
  • Design for Testability (DFT)
  • Diagnosis and Silicon Debug
  • Fault Diagnosis and Failure Analysis
  • Fault Modeling and Simulation
  • Fault Tolerance
  • Hardware Oriented Security and Trust
  • High-Speed I/O Test
  • Heterogeneous Testing
  • Low-Power IC Test
  • Machine Learning in Test
  • Memory Test, Diagnosis, and Repair
  • Multi-/Many-core Processor Test
  • Online Test
  • On-Chip Measurement
  • Power/Thermal/Reliability Issues in Test
  • Reconfigurable System Test
  • Reliability and Testing for Emerging/Approximate/Quantum Computing
  • RF Test
  • Safety and Test for Automotive ICs
  • Self-Repair
  • SiP, Chiplet, 2.5D and 3D IC Test
  • Software Test and Reliability
  • Standards in Test
  • System-on-Chip Test
  • Test Compression
  • Test Economics
  • Test Quality
  • Test Synthesis
  • Test for Biomedical Circuits and Systems
  • Test for MEMS and Microfluidic Systems
  • Test for Nanoscale Devices and Emerging Technologies
  • Test for Reversible and Quantum Circuits
  • Test for Sensors and IoT
  • Yield Analysis, Learning, and Enhancement